Seminar Programme* 每 Shanghai & Beijing
| 8:30 am 每 8:55 am |
Registration for Seminar & Opening of Exhibition Area |
| 8:55 am 每 9:05 am |
Special SoCIP 2008 Inauguration Performance:
The Amazing Four's Belly Dancing |
| 9:05 am 每 9.30 am |
Welcome Address:
"The Inauguration of SoCIP 2008 Seminar & Exhibition"
Mr Mon-Ren Chene, Chairman of the Board, S2C Inc
Mon-Ren Chene has over 25 years of experience in engineering and management in EDA, FPGA, and ASIC design flows, and software development. In 1995, Mr. Chene co-founded Osprey Design Systems, which later merged with Aptix Corporation, and was the firm's software architect and vice president of software development; since then, he worked in the software R&D, consulting, and technical services divisions. Prior to that, Mr. Chene held various engineering and product management positions at Quickturn Design Systems, Cadence Design Systems, Xilinx, Silvar-Lisco, and NCA Corporation. Mr. Chene holds three US patents and has published numerous FPGA-related articles. He has an MS degree in operations research from Stanford University and an MA degree in statistics from Arizona State University. |
| 9.30am 每 10:25 am |
"The Era of NEW ASICs"
Traditional Standard-cell-based methods of doing ASIC or ASSP development are becoming increasingly expensive as process geometries reduce. The cost of ASIC development can easily be tens of millions of dollars. eASIC's NEW ASICs bring in a new era of ASIC design that is helping designers of FPGAs, ASICs and ASSPs develop many new ASIC designs per year.
In this technical presentation you will learn how to design NEW ASIC devices in a fraction of the time, at a fraction of the cost of standard cell ASICs and receive working devices in as little as 4-5 weeks. The presentation will cover 90nm and 45nm NEW ASIC devices and design solutions such as software, IP (e.g. ARM, Tensilica) and development kits.
If you are an Electronics System Designer and are facing increased market competition, then this presentation will be a one of the best time investments you will make this year.
Mr Jasbinder Bhoot, Sr. Marketing Director, eASIC Corporation
Jasbinder Bhoot is Senior Director of Marketing at eASIC Corporation. He is responsible for setting the marketing strategy for the company and has overall responsibility for product definition and deployment. Mr. Bhoot has more than 15 years of ASIC and FPGA experience. Prior to joining eASIC, he was part of the vertical marketing team at Xilinx. In this role, he managed the partner solutions team that included IP, design services, EDA, and ASSPs. Mr. Bhoot has also held technical and business management positions at LSI Logic, Altera, Sony Semiconductor, and Texas Instruments. Mr. Bhoot holds a B.S. in electronic engineering from the University of Westminster and an M.B.A. from the University of Nottingham. |
| 10:25 am 每 10:45 am : Tea Break |
| 10:45 am 每 11:40 am |
"Selecting IP Wisely: Multimedia Core Examples
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Incorporating IP cores has become a standard practice for creating competitive, on-time SoC products. The best choices of IP and provider are seldom clear, however, and making a mistake can be very damaging to budgets and schedules. This talk describes several misconceptions that still exist regarding the selection and use of good IP, and offers suggestions by which designers can improve their IP experience. The application of these concepts is then illustrated with the popular category of multimedia IP: many techniques and cores are available for compressing images, but how does a design team choose the best for their particular project?
Mr Newton Abdalla, Vice President, CAST, Inc.
Newton is a founding partner of CAST along with several colleagues from software developer HHB Systems. He served as Manager of New Business Development for HHB in New Jersey and Senior Applications Engineer in Tokyo, Japan. Newton holds a M.S.E.E. from Fairleigh Dickenson University, where he was a member of the electrical engineering faculty. Currently living in his native country of Brazil and verifying the strength and flexibility of CAST's virtual company model, Newton contributes his international experience, digital design expertise, and a variety of managerial and sales functions as Vice President of CAST, Inc. |
| 11:40 am 每 12:35 pm |
"Semiconductor IP for Your Next Generation of Designs"
IPextreme gets IP from the world's largest semiconductor companies such as Freescale, Texas Instruments, Motorola, Cypress Semiconductor, National Semiconductor, NXP and Infineon and delivers it to you. This session will cover IPextreme's diverse portfolio of semiconductor IP ranging from CPUs and peripheral IP to clock generation and debug for consumer, mobile and automotive applications.
Mr Rick Tomihiro, VP of Marketing, IPextreme
Rick Tomihiro brings nearly 30 years of semiconductor design and marketing experience to IPextreme. In the 12 years prior to joining IPextreme, Rick led the semiconductor IP marketing teams for Synopsys, IPCore and Mentor Graphics. Earlier in his career, 1978-1996, Rick was a CPU designer for Amdahl, STC Computer Research, Tandem Computers and Chips&Technologies. After which he was the Director of Marketing for NexGen Corporation which was later acquired by Advanced Micro Devices. |
| 12:35 pm 每 1:45 pm - Lunch |
| 1:45 pm 每 2:40 pm |
"What's the difference between Tensilica and ARM?"
Tensilica and ARM both offer 32-bit processor cores, but Tensilica's newer architecture results in lower-power and higher performance. Tensilica also offers cores specifically optimized for audio and video. Tensilica's customers can customize its Xtensa processors to do the dataplane processing unlike ARM's processor cores, which usually require hardware accelerators for the data-intensive processing tasks. Find out how Tensilica's automated processor customization technology can be used in mobile multimedia, routers, VDSL, VoIP, printers, digital TV, WiMax, baseband radios, and much more. This session will point out the important differences between ARM and Tensilica and why often the two companies' cores can be used in the same chip design or some companies are just using Tensilica's cores instead of ARM cores.
Mr Ryan Li, PRC Country Manager, Tensilica Inc
Joined Tensilica in 2004 and has since been responsible for Tensilica's business in PRC. Started local PRC office and build a strong local team which has implemented eCosystem/Unversity program. Currently, Tensilica has more than 10 major customers in PRC now. The business has grown from strength to strength. Previously, served as Intel's Marketing Manager and was responsible for business development and marketing to promote Intel IXP series of Network Processor in PRC. Also, served at IMAG Industries, Inc. as a FAE manager for Tornado/Vxworks RTOS product line from Wind River; Product Specialist for Bluetooth/IrDA product line from ESI. Successful experience of products promotion and business development in local embedded and IC industry with, key successful customers such as Huawei﹜ZTE﹜Datang﹜Alctel ShangHai Bell﹜UTStarcom﹜Penstar﹜Nufront﹜Chipnuts ﹜Triductor. |
| 2:40 pm 每 3:35 pm |
※High Definition Video - The Product and the Perspective.§
The analog tape based audio players are being decimated by the flash and Hard disk drive based digital music players. A similar revolution is happening in the Video world where the scan line based analog TVs are getting replaced by the new sleek "wall hanging" machines - the glittering LCD and plasma Digital TVs. Most of these TVs belong to the High Definition TV world. The highest resolution that can be viewed on the HDTV is roughly six times that of the standard analog TV. IPTV is becoming the normal way of seeing movies. The format wars for the High Def DVDs has just got over. Standards have evolved in Video compression since it is critical to inter-operate across different equipments from multiple suppliers. Overtime, multiple standards have also evolved trying to address higher performance requirements and multiple applications.
Given this background, it is imperative to provide solutions that can quickly address multiple market needs with a monolithic solution. Ittiam's Intellectual property 每 (Internally Code named Trinity) enables the ASIC designer to exactly do that. The Technology can be used to address multiple market segments in the areas of Digital TV and in specific HDTV, IPTV, High Def Set-top boxes and High Def DVDs. The monolithic Video Engine transforms itself (based on the requirements) into one of the many Video formats that are being used in these applications and decompresses the signal and passes it on to the high resolution monitor or TV. Time to market is a key factor for the Application Specific Standard Products (ASSP) devices. The Consumer segment is a fast paced market with features that needs to be added on a regular basis. The ASSP devices are usually a SOC (System on Chip) device which means that they integrate many functions required for the target market into a single Chip. Key is to design a Chip that can be used to address varying application needs with a single device. Ittiam＊s trinity IP (Intellectual Property) exactly does that.
Ravishankar G, Vice President & Business Manager, Ittiam Systems
Ravishankar G is currently the Vice President and the Business manager of the Silicon IP group of Ittiam Systems, Bangalore, India. He is part of the founding team that started Ittiam systems in 2001. Prior to this, Ravi was with Texas Instruments in India from 1986 to 2000. During his Tenure at TI, Ravi worked in the DSP design and DSP applications field before becoming the General Manager of the Software Development systems group of TI in India. He holds a Bachelors degree in Physics from University of Madras and an Engineering Degree in Electronics and Communication from Indian Institute of Science, Bangalore.
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| 3:35 pm 每 3:55 pm - Tea Break |
| 3:55 pm 每 4:50 pm |
※One PHY technology two application markets (HDP - HDMI & DisplayPort Combo PHY)§
As we are entering the super high definition display era, we have the choice of different offerings of high speed digital connections based on DDWG Digital Visual Interface (DVI™), High Definition Multimedia Interface (HDMI™), or VESA DisplayPort™ standards. All of them are based on different flavors of serializer/deserializer (SerDes) technologies. In order to support these different standards, SoC providers need to either design an application specific IC solution to fit different market requirements or simply put two different blocks into one design which is not cost and power effective. Early this year Transwitch dubbed industry leading highest speed of 3.5Gbps HDMI 1.3 Tx/Rx IP cores in 90nm process node. Today, Transwitch like to offer the HDP Tx/Rx IP solutions which provide HDMI/DisplayPort combo PHY technology into one small core and low power design based on both 65nm and 90nm processes.
Mr. Limas Lin, Director Of Business Development, Transwitch Corporation
Mr. Lin has 15 years of semiconductor experience. Prior to join Transwitch Corporation, he spent 4 years in charge of Kolorific worldwide marketing group. Mr. Lin was a early member and Director of Marketing for Panstera, which was acquired by Pixelworks in January 2001 for $127 million. In addition, he held various positions with ITE/ITeX and National Semiconductor. Mr. Lin is a holder of 1 US patent. He earned a BSEE from Tatung Institute of Technology and a MSEE from Northwestern University. |
| 4:50 pm 每 5:15 pm |
- Q & A
- Lucky Draw |
| - END - |
* All programs indicated and time are subjected to change. |
